VHDL is a language that is used to describe the layout of logic gates for a PLD on a VHSIC. There is a hierarchy of PLD’s; SPLD, GAL, CPLD, FPGA. FPGA’s are used for low production runs and high modifiability for future updates. This is because they are a customisable array of logic gates, that can be connected however you like, to make whatever combinational logic signal processing you want. Another use case is during the development of ASIC designs to reduce the prototyping cycle time. VHDL and FPGA’s originate from a US DOD project from the early 1980s.